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Ashling
Development Tools for NXP HiPerSmart™ Smart Cards 
Ashling
supplies a complete range of tools for NXP HiPerSmart™ Smart
Card development based on the SmartMIPS™ core, including:
-
AsIDE Integrated Development Environment with project build manager
and source-code editor
-
Algorithmics’ SDE-MIPS GNU Compiler and Linker tools for HiPerSmart™
-
PathFinder
C and Assembly Source Debugger
-
Cycle-accurate or Instruction-set software Simulators
-
Vitra, Genia and Opella hardware emulators, providing non-intrusive
run-time control together with real-time code execution and data trace
-
HiPerSmart™ hardware Evaluation Board and ISO-7816, SIM or USIM
Probe Adapters for Smart Card reader
Vitra
Networked Emulator with Trace
High-Speed
Emulator and Real Time Trace for HiPerSmart™ Smart Cards
- High performance
Real-Time Emulator and Trace for HiPerSmart™ Smart Card development
- Complete
environment for development, debugging, optimization and testing for
performance-critical HiPerSmart™ applications with Instruction
Trace and Data Trace debugging
- Trace
memory available in 64K-frames or 512K-frames options
- Remote
debugging via TCP/IP
- Provides
program-load, run, halt, hardware and software breakpoints, register
display and modify, triggers, real-time trace and Source Debugging with
PATHFINDER
- Connects
to host PC using an Ethernet, USB or RS232 connection
- Includes
Instruction and Data Trace and Triggering for target systems with the
MIPS™ PDTRACE™ interface
Genia
Networked Emulator
High-Speed
Emulator for HiPerSmart™ Smart Cards
- Stand-alone
real time Networked Emulator for HiPerSmart™ Smart Card development
- Connects
to host PC using an Ethernet, USB or RS232 connection
- Remote
debugging via TCP/IP
- Provides
program-load, run, halt, hardware and software breakpoints, register
display and modify, and Source Debugging with PATHFINDER
- Non-intrusive
real time debugging; requires no target system resources
- Display/read/write
of target system memory and peripheral registers
- High
speed application code download
- GENIA
may be easily upgraded to the trace-capable VITRA Networked Emulator
Opella
Emulator
Entry-level
Emulator for HiPerSmart™ Smart Cards
- Entry-level,
low-cost Emulator for HiPerSmart™ Smart Card development
- Connects
to the host PC via a standard USB high-speed connection
- Provides
program-load, run, halt, hardware and software breakpoints, register
display and modify, and Source Debugging with PATHFINDER
- Non-intrusive
real time debugging; requires no target system resources
- Display/read/write
of target system memory and peripheral registers
- Compact,
low cost, easy-to-use Real-Time Emulator for development of NXP
HiPerSmart™ Smart Card applications
PathFinder
Source-level
Debugger for HiPerSmart Derivatives
PATHFINDER
is the Source Debugger and user interface for all Ashling HiPerSmart™
debug products, including the Ashling VITRA, GENIA and OPELLA hardware
Emulators for HiPerSmart™ and the HiPerSmart™ software Instruction-Set
Simulator and cycle-accurate simulator.
PATHFINDER
provides multiple user-configurable windows, point-and-click, drag-and-drop,
hover help and hover data display, splitter windows, menu-bar, button,
hot-key and script (macro)-file controls.
#
PathFinder
features
include:
- Full C
and Assembly source level debug support including step-into, step-over
and step-out-of
- Built-in
Code Browser allowing rapid navigation of application source code
- Call
Stack (Backtrace) window shows current function stack with optional
parameter display
- Inline-editable
Memory, Register and Variable windows
- Changed
memory and variable values are highlighted when program halts
- Integrated
Trigger setup and Trace viewing for VITRA Networked Emulator with Trace
- Powerful
script language to control, monitor and log all Emulator functions
- Support
for all third party MIPS™ toolsets including Algorithmics’
SDE-GNU, Green Hills Software, Wind River Systems (Diab Data) and all
other ELF/DWARF compliant compilers
- Operating
System Debug using integrated RTOS monitoring window based on open-standard
Kernel Debug Interface (KDI) API
- Full
run-time control debug support for cached applications, with Instruction
and Data cache windows
- Hardware
and unlimited software breakpoint support
- SmartMIPS,
MIPS32 and MIPS16e instruction-set support
- Dedicated
peripheral windows showing HiPerSmart™ EEPROM and flash memory
- Translation
Lookaside Buffer (TLB) window allowing easy setup and interrogation
of the TLB
- Support
for Windows 9x/Me/NT/2000/XP
AsIDE Integrated Development Environment for HiPerSmart™ application
development
ASIDE is
Ashling's Integrated Development Environment for HiPerSmart™ application
development.
The ASIDE
package, which includes the SlickEdit™ Editor, together with Algorithmics’
SDE-MIPS GNU Toolkit, provides a powerful and convenient development environment
for HiPerSmart™ applications.
The Algorithmics’
(www.algor.co.uk)
SDE-MIPS GNU Compiler and Linker tools, included on the Ashling HiPerSmart™
Development Tools CD, are configured and invoked from ASIDE. Compiler
and linker switches may be set via user-friendly dialogs.

AsIDE
features
include:
- Full Project
Management support including project and make-file generation
- SDE-MIPS
GNU Compiler/ Linker tool configuration via user-friendly dialogs
- Context
sensitive error browsing for Algorithmic’s SDE-MIPS GNU tools
output: AsIDE highlights the offending line in the relevant source file
- Direct
invocation of Ashling’s powerful PATHFINDER source-level debugger
directly from AsIDE. The current project is automatically loaded ready
for debug
- Support
for Windows 9x/Me/NT/2000/XP
AsIDE
includes the SlickEdit sstate-of-the
art programmer’s editor, with advanced features that include:
- Configurable
language-specific color coding
- Multiple
file and directory search and replace
- DIFFzilla™
to view differences between source files, directories, source trees
or symbols
- Version
control management interface to all popular version control packages
- Context
Tagging™: Auto List Class Members and Function Parameter Info
- Symbol
References and Class Browser
Target
Connection; Device Support
VITRA, GENIA and OPELLA Emulators connect to the NXP’
HiPerSmart™ Evaluation board, with a choice of ISO7816 or GSM SIM
Smart Card probes for testing in the user’s Card Reader. All NXP
HiPerSmart™ Smart Cards are supported, including P9SC128 and P9CC160.
Ashling
Smart Card Support Range
Ashling provides development support for NXP’
P8WE50xx 8-bit Contact and P8RF50xx Contactless Cards, SmartMX expanded-memory
Smart Cards, SmartXA2 16-bit Smart Cards, and HiPerSmart™ (SmartMIPS™)
32-bit Smart Cards. Ashling's continuing technical co-operation with NXP
Semiconductors ensures that development support is provided for each new
Smart Card device introduced by NXP.
Order
Codes
| Product
|
Order
Code |
| HiPerSmart™
Development Tools CD (includes PathFinder for HiPerSmart™, AsIDE,
Algorithmics’ SDE-MIPS GNU Tools and HiPerSmart™ Software
Simulator) |
DEVCD-HPS |
| Opella
for HiPerSmart™ |
OPELLA-HPS |
| Genia
for HiPerSmart™ |
GENIA-HPS |
| Vitra
for HiPerSmart™ Networked Emulator with 64Kframes x 128-bit
trace |
VITRA-HPS-T64K |
| Vitra
for HiPerSmart™ Networked Emulator with 512Kframes x 128-bit
trace |
VITRA-HPS-512K |
| Ashling
card reader interface |
IN-CLA7816USB |
| EJTAG
PDTRACE Trace Probe Cable for Vitra Emulators |
TPA-MIPS-PDTRACE-38 |
| 14-Way
EJTAG Debug Probe Cable for Opella, Genia and Vitra Emulators |
TPA-MIPS-EJTAG-14 |
| User
I/O Cable for Genia and Vitra Emulators |
TPA-GENIO |
| User
I/O Cable for Opella Emulators |
TPA-EXTIO-OP |
| Extended
Trigger/Trace Target Probe Assembly |
TPA-TRIG-TRACE |
MIPS,
SmartMIPS and PDTRACE are trademarks or registered trademarks of MIPS
Technologies, Inc
|