Opella-XD for MIPS

Ultra-high-speed EJTAG Debug Probe

Ashling's Opella-XD EJTAG Debug Probe is the fastest available debug probe for embedded development on MIPS^TM RISC cores.

Advanced features of Opella-XD include:

• Fast, easy-to-install USB 2.0 High-Speed Interface (480Mb)
• Supports all popular hardware debug protocols
• Unique Auto-conditioning Probe provides maximum possible download speed to target with fastest JTAG clock frequencies
• Hot-plug support allows post-mortem debugging
• Fast, trouble-free Plug-and-Play installation
• Small, versatile Target Probe Cable fits on any target board
• Fast in-target Flash Programming
• Supports latest EJTAG 4.10 MIPS^TM debug protocol
• Wide target voltage range: 0.9V to 3.6V
• Versatile Target-Reset and Test-Port-Reset support
• Works with Windows and Linux hosts
• Built-in diagnostics instantly show status of Target, Debug Probe and USB link
• Universal Hardware-Debug platform for all popular target architectures and compilers

Benefits of Opella-XD to the embedded hardware developer:

•  Accelerates the entire embedded-hardware debug process: ultra-fast installation, code download and flash programming saves time at every code rebuild
• Instantly autoconfigures to target system
• Long-term investment: works with all popular target architectures and compilers
• Helps with the most difficult debugging tasks: hardware bring-up, operating-system booting, post-mortem debugging
• Future-proof: works with latest hardware-debug protocols, all popular host operating-systems
• Compact, easy-to-install target probe cables support all popular debug interfaces

Opella-XD Probe Specification:

• High-speed USB2.0 (480Mb/s) interface to host PC or Linux workstation
• Target EJTAG clock rates up to 100MHz
• Auto-conditioning for fast EJTAG clock frequencies
•  Sustained code download to target at over 3MB/s (using 100MHz EJTAG clock)
•  Supports all MIPS^TM hardware-debug standards: EJTAG 4.10, 3.10, 2.6x, 2.5x, 2.0x and 1.5x
•  14-way or 20-way IDC target EJTAG connectors
•  Configurable Target-Reset and Test-Port-Reset, under full user control
• Fine-grained adjustment of JTAG clock frequency from 1KHz to 100MHz
• Supports target operating voltages from 0.9V to 3.6V. Opella-XD detects and automatically configures for the appropriate target voltage
• Supports RTCK adaptive clocking of debug data from target (EJTAG 4.10)
• "Hot-plug" support; allows connection to a running target without resetting or halting
• Fully powered by USB interface; no external power-supply needed
• Support for all on-chip hardware breakpoints; unlimited number of software breakpoints
• Big-endian and little-endian target architectures supported
• Full support for MIPS16^TM/MIPS16e^TM code compression

Source Level Debugger:

PathFinder is Ashling's Source-Level Debugger for MIPS^TM-core devices, with multiple user-configurable windows and intuitive operation.

Full target debug control is supported, including program download, go/halt/step and setting/clearing of breakpoints. Variable, target memory and registers may also be viewed and modified.

A built-in macro language allows automation of repetitive tasks.  Target flash programming support for a broad range of devices is also provided.

Compiler Support:

All popular MIPS^TM C/C++ compilers are supported including GNU GCC, Green Hills Software and WRS/Diab Data and all other ELF/DWARF compliant compilers. See the separate PF-MIPS datasheet.

GDB-Server-MIPS:

Ashling's GDB-Server-MIPS software package allows Ashling's Target Debug Probes to be used with the GNU GDB open-source debugger. The Ashling GNU GDB Server is available for Windows and Linux (x86 based) hosts and supports GNU GDB and all Eclipse CDT based debuggers (e.g. MontaVista Devrocket).

MIPS, MIPS16 and MIPS16e are Trademarks of MIPS Technologies, Inc.