May 2013: Mentor Graphics Brings Seamless Software Trace, Debug, and Performance Analysis to Embedded Systems Development
September 2012: Ashling announces debug and trace support for Broadcom BMIPS powered devices
October 2011: To coincide with the 2011 ARM Technology conference in Santa Clara CA Ashling Microsystems has launched a new high performance Real Time Debug and Trace Probe for ARM™devices
Ashling announces support for cJTAG debug interface standard for Synopsys DesignWare ARC processor cores
May 2012: Ashling announces support for cJTAG debug interface standard for Synopsys DesignWare ARC processor cores.
May 2012: Ashling announces support for Freescale’s Qorivva MPC5674 device
May 2011: Ashling white paper on Embedded Linux Debugging now available.
December 2010: Ashling Releases Full Embedded Linux Debugging support for MIPS based Applications.
November 2010: Ashling Microsystems Ltd., a NeST group company, has appointed Mr. Atul Kapur as its North American Sales Director based at the company’s offices in Chantilly VA.
September 2010: Ashling’s PathFinder-XD Debugger Software: Fully Functional, Unrestricted and Free of Charge!
Ashling has released support for Compact JTAG (cJTAG), which is based on the IEEE 1149.7 standard and allows debugging of Synopsys® DesignWare® ARC™ devices processor cores through a two-wire interface when using the Ashling Opella-XD Debug Probe.
cJTAG support requires a software update and a new revision (R1) of the Opella-XD’s Target Probe Assembly (TPA). Customers should contact their local Ashling sales representative for upgrading details. The Opella-XD datasheet is available here.
Commenting on the product release, Hugh O’Keeffe, Engineering Director of Ashling Microsystems, said “Low-pin count debugging is now available for ARC-powered devices, allowing SoC vendors to reduce the number of pins they have to dedicate to test and debug, without any reduction in functionality or performance.”
When asked what this means for ARC customers, Mike Thompson, senior marketing manager for ARC products at Synopsys, stated, “SoCs targeting embedded applications must meet increasingly stringent cost and power budgets. By adding support for the IEEE’s Compact JTAG standard in their Opella-XD Debug Probe for ARC processor cores, Ashling enables designers to use fewer pins to debug their SoCs containing ARC microprocessors, saving both power and cost.”
Synopsys' ARC processor IP includes the configurable ARC EM, ARC 600 and ARC 700 families of 32-bit processor cores, which enable SoC designers to implement a full range of embedded microprocessors optimized for their specific target application. For more information, visit here.
Ashling is a member of the Synopsys ARC Access Program, which is an ecosystem of third parties supporting the ARC Architecture with software development tools, real-time operating systems (RTOSes), middleware and semiconductor IP. The Program provides designers with access to a wide choice of embedded software and hardware solutions available for DesignWare ARC processor cores.
About Ashling Microsystems
Ashling Microsystems is an international Embedded Software Development Tools company. Ashling is a subsidiary of the NeST Group, a broad based technology provider operating in the areas of software development, electronics design and manufacturing, optronics and fiber optics, broadband and RF solutions and power systems and magnetics. Through its close cooperation with leading semiconductor vendors, Ashling is a world leader in the Embedded Software Development Tools market. Ashling has development centres in Limerick, Ireland and Trivandrum, India and sales and support representatives worldwide.
Synopsys, ARC and DesignWare are registered trademarks of Synopsys, Inc.