Opella-XD
High-performance Ashling Debug Probe
Opella-XD is Ashling’s high-performance Debug Probe for embedded development with support for multiple target architectures including RISC-V, Arm-Cortex, MIPS (P8700 & I8500) and Synopsys ARC-V and ARC powered systems. Opella-XD works with Ashling’s RiscFree SDK for advanced embedded system debugging and on-chip tracing.
Features:
- Up to 3MB/s download speeds making it suitable for large, complex, software-intensive projects.
- Supports JTAG, EJTAG, cJTAG & CoreSight SWD & DAP debug interfaces with fine-grained adjustment of clock frequency from 1kHz to 100MHz.
- Auto-conditioning ensures maximum possible download speed with fastest JTAG clock frequencies.
- Hot-plug support – allows connection to a running target without resetting or halting.
- Heterogeneous (e.g., Arm + RISC-V) & homogeneous debug support for multi-core SoCs sharing a single debug interface (e.g., via JTAG, cJTAG or CoreSight DAP & SWD).
- Supports 32-bit & 64-bit target devices.
- Powered by USB2 interface – no external power-supply required.
- Opella-XD detects & automatically configures for the appropriate target voltage (0.9v to 3.6v).
- Low-level JTAG command-line console and APIs for device bring-up etc.
- Display/read/write of target system memory & peripheral registers.
- Support for on-chip hardware breakpoints – unlimited software breakpoints.
- Run/stop control of target application including go, halt, step over, step into & step out.
- Configurable Target-Reset & Test-Port-Reset, under full user control.
- Built-in diagnostics instantly show status of Target, Debug Probe & USB link.
| Product | Order Code |
|---|---|
| Opella-XD Debug Probe (with 20-way 0.1” target interface) | OPELLA-XD |
| Optional 14-way 0.1” adapter for EJTAG targets | AD-EJTAG-14 |
| Optional 10-way 0.05” adapter for MIPI/CoreSight targets | AD-CS-10 |
| Optional 12-way 0.1” adapter for RISC-V targets | OPXD_TPA_RISC-V_ADAPTER |
| Optional 6-way cJTAG/JTAG 0.1” adapter | AD-ARC-6JTAG |