Ashling’s Tools-as-a-Service™ (TaaS™) model allows development of a comprehensive tool suite tailored and optimized for your specific device.
With the emergence of configurable processor cores (e.g. RISC-V, DesignWare® ARC®, ARM® etc), it is now possible to build highly-customized devices which are designed specifically to meet your application needs. However, using off-the-shelf “generic” tools will only allow your customers to scratch the surface of your devices capabilities and to allow you and your end-users to get the best out of your device, you need a toolset tailored to take advantage of all the compelling unique features your device offers whether these be Custom Instruction Extensions, Heterogenous or Homogenous Cores, Crypto Co-processors, Custom Peripherals, Hardware Threading etc.
Ashling’s TaaS™ model allows us to jointly develop and rapidly bring this custom tools solution to the market thus giving your device a key, competitive advantage and ensuring your customers can take maximum advantage of everything your device has to offer.
Ashling’s TaaS™ offers many benefits including:
- Rapid availability of a customized and optimized toolset for your device including some or all of the following: IDE, Debugger, Compiler Toolchain, Simulators, Hardware Debug and Trace Probes, Operating Systems, BSPs etc.
- Toolset feature priorities and roll-out are defined by you and implemented by us
- Toolset intellectual property becomes yours (or can be placed in Escrow)
- Toolset can be made available “free-of-charge” to your customers
- Toolset development, support, maintenance and quality assurance all handled by Ashling
THE RISC-V EXAMPLE
RISC-V is an up and coming open-source ISA (Instruction Set Architecture) which allows users to extend the ISA with their own unique instructions optimized for their application without entering expensive and prohibitive licensing agreements as need for closed-source cores. ISA extensions can only succeed if the tools solution is able to take to support these extra instructions both from a Compiler Toolchain (e.g. in the optimizer) and Debugger perspective. Ashling’s TaaS™ model addresses this challenge by providing custom tools supporting the ISA additions which are supported, maintained and regularly updated. Using the TaaS™ model, our customers have unlimited use of the development tools within their own organization and at their end-users. In most cases the customer will own the IP of the toolset giving them full control and support for the longevity of their toolset with the flexibility of being able to make changes and updates driven by their and their customer’s needs.
After looking for a tool vendor that can offer the right tools offering for its DesignWare® ARC® users, Synopsys found out that off-the-shelf-tool vendors lack the skills, expertise and ability to provide a dynamic response to a fast moving and changing need. That’s when Synopsys selected Ashling’s TaaS™ model and Ashling became its preferred tools partner. Ashling and Synopsys now have a multi-year TaaS™ model in place for hardware and software tools development including extension, maintenance and verification of Synopsys’ MetaWare IDE and MDB debugger tools for ARC® processors. One of Ashling’s key differentiators is integration of a real-time trace hardware probe which is key for code developers whose applications need high capability non-intrusive debugging or have real-time constraints.
“Synopsys’ collaboration with Ashling on the development of their Ultra-XD real-time trace probe provides developers with integrated tools to accelerate the development and debugging of software for ARC-based embedded systems.” John Koeter, Vice President of Marketing for IP and Prototyping at Synopsys.
In our partnership with Synopsys, we are leveraging our focused engineering expertise and many years of know-how in embedded design to develop a unique solution. Ashling is thrilled to be working on this challenge in collaboration with Synopsys to create a complete deployable solution.
“SoCs targeting embedded applications must meet increasingly stringent cost and power budgets. By adding support for the IEEE’s Compact JTAG standard in their Opella-XD Debug Probe for ARC processor cores, Ashling enables designers to use fewer pins to debug their SoCs containing ARC microprocessors, saving both power and cost.” Mike Thompson, Senior Marketing Manager at Synopsys.
This relationship has flourished over the years and now the ARC® processor market has not only one of the best tools offerings but also best-in-class support, maintenance, upgrades, updates that all ARC® end users enjoy. Ashling TaaS™ has made the Synopsys DesignWare® ARC® offering much more competitive in the embedded market and contributed to its success.
Ashling and NXP have a multi-year TaaS™ agreement in place for the development, supply and support of hardware and software debug solutions for NXP Secure Devices dedicated to the Smart Card, Identification and Secure Transaction markets.
“Ashling, with their extensive experience in embedded software and hardware development, enable NXP customers to rapidly get from design concept to end market with an optimized usage of the resources and technology we are integrating in our smart card and secure element products.” Gérard Maniez, Director at NXP.
As part of this agreement, Ashling have also integrated support for their Hardware based SmartICE Debug and Trace probe into the Keil tools.
“The Ashling SmartICE extends Keil PK51 to a complete solution for target debugging on the SmartMX hardware. SmartICE is fully integrated into the µVision Debugger and gives PK51 users powerful capabilities for program test and verification.” Reinhard Keil, Director of MCU Tools at ARM.
Ashling’s skills and expertise in providing custom tools solutions is unmatched and we have global engineering teams in Ireland and India ready to start working for you now. Please contact us to further discuss your requirements using the form below.