A Global World-Class Partner

Ashling is a global, world-class technology partner providing integrated solutions including tools and design services that are at the heart of the embedded environment.

Global organizations trust Ashling to provide products and services for their business-critical operations.

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See Hugh O’Keeffe, Ashling VP of Global Engineering present Ashling’s RiscFree™ IDE and Debugger for Multi-Core Heterogeneous Software Development at the recent RISC-V Summit held in December in San Jose, CA.


Complete RISC-V ecosystem

Ashling is an active member of the RISC-V Foundation devoted to the development of an open, extensible ISA and we engage and cooperate with leading OEMs and semiconductor companies to successfully develop custom RISC-V engineering solutions including tools.


Complete MIPS ecosystem

Ashling provide a range of hardware debug probes supporting both EJTAG debug and Real-time Trace integrated into Ashling's PathFinder-XD source-level debugger.


Debug Tools for Synopsys® DesignWare® ARC

Ashling provide a range of hardware debug probes which support both JTAG Debug and Real-time Trace and are integrated into the MetaWare and GNU ARC Toolchains.


Heterogeneous Multicore Debug Paper by Róisín O’Keeffe…

December 16th, 2020 – LIMERICK, IRELAND. Over the last decade there has been a dramatic increase in the number of multicore designs in embedded electronic SoC (System-on-Chip) devices. This drive towards multicore SoC designs was primarily driven by a desire for improved power consumption, cost, performance criteria, smaller form factors and concurrent application requirements. Combining several cores into a single device can reduce the number of components in the end-product thereby lowering…

New low-cost Opella-LD Debug Probe now available from Ashling…

December 4th, 2020 – LIMERICK, IRELAND. Ashling, Ashling announces immediate availability of Opella-LD, a new low-cost hardware Debug Probe for embedded development.Opella-LD supports debug of target architectures based on Arm, RISC-V or Synopsys ARC cores.
It supports JTAG, cJTAG and SWD interfaces and is OpenOCD compatible. Opella-LD can be used together with either Ashling’s RiscFree™ Eclipsed-based IDE/Debugger or the GNU GDB Debugger. Ashling provides a dedicated support page…

Execution Profiling Tool for RISC-V and ARM from Ashling…

November 9th, 2020 – LIMERICK, IRELAND. Ashling announces availability of an integrated Code Execution Profiling Tool for Arm and RISC-V based applications within Ashling’s RiscFree™ IDE and debug solution. Execution Profiling is a critical tool enabling optimisation and speed improvements in embedded applications. The tools allow developers to determine where the application computing time is spent allowing them to focus their optimisation and speed-improvement efforts on the program areas which…


Complete NXP ecosystem

Ashling provides a range of tools for the development of both NXP Smart Card and Secure Element based designs. In addition, Ashling also provide debug tools for the NXP Power Architecture.