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Ashling’s RiscFree™ Toolchain now supports Western Digital’s SweRV RISC-V Cores
September 24th 2019 – Redwood Shores, CA. Ashling, a leading provider of embedded development tools announced today full tools support for Western Digital’s RISC-V open source SweRV cores on their RiscFree™ Toolchain. Western Digital’s RISC-V open source SweRV Core is a 32-bit, 2-way superscalar, 9 stage pipeline core offering compelling capabilities for embedded devices supporting data-intensive edge applications such as storage controllers and industrial IoT. RiscFree™ is Ashling’s Eclipse-based Integrated Development…
Ashling to present MATLAB™ Plugin at Synopsys ARC Processor Summit September 19th, 2019
August 14th, 2019 – Limerick, Ireland. Ashling today announced a new strategic collaboration with Synopsys Inc., which provides a Plugin allowing use of the MathWorks MATLAB and Simulink tools with the Synopsys DesignWare MetaWare Development Toolkit. The Ashling developed Plugin allows users to compile MATLAB/Simulink-generated C code using the MetaWare Development Kit resulting in code highly optimised for running on Synopsys DesignWare ARC processors particularly those with DSP extensions…
Ashling extends Ultra-XD Real-Time Trace system for Synopsys’ DesignWare® ARC®…
August 7th 2019 – Limerick, Ireland. Ashling announces today that the Ultra-XD Real-Time Trace Probe supporting Synopsys’ DesignWare® ARC® HS and ARC EM Processor Families has now been extended to support the latest versions (v2) of Synopsys’s ARC Trace Interface Option.
Developed in close cooperation with Synopsys, the Ashling Ultra-XD Trace Probe integrates seamlessly with the Synopsys ARC MetaWare Debugger and is a powerful high-speed real-time trace and run-time control debug probe for embedded…