Compiler Toolchains

Ashling provides a full compiler toolchain consisting of:  compiler, linker, assembler, libraries, debugger and binutils based on either the open source GNU GCC or LLVM distributions as required.

Ashling’s compiler toolchain team is highly experienced in toolchain development including adding custom ISA support (e.g. using CGEN), optimising for speed and code-density (both at a compiler and linker level) including use of custom ISA extensions, RISC-V/MIPS/ARM/Power/Intel support, bug-fixing, testing, verification, certification and library development. Ashling also works together with specialist open source software toolchain company Embecosm for dedicated compiler toolchain porting and optimisation projects. Ashling’s expertise includes:

  • Improved optimization (i.e. code generation in terms of speed and code-size) of the toolchain at both a compiler and linker level
  • Support for custom instructions to the toolchain including support in the compiler optimizer
  • New libraries and optimization of existing libraries
  • Testing, verification and bug-fixing of the toolchain
  • Ensuring the toolchain is kept up to date with all other community updates (e.g. quarterly releases)
  • Compliance, certification and qualification of the toolchain e.g. ISO26262/ASIL/SIL
  • Advanced debugging features include support for simulator and hardware based debugging (including use of Ashling hardware probes). See below.


The debugger can work from the command-line or integrated into the IDE (Eclipse). Debugger features as follows:

  • Support for managed and non-managed projects (e.g. projects built inside or outside of the IDE)
  • Simulator support (QEMU, RTL, FPGA emulation platforms and third-parties)
  • Hardware probe debug and trace support fully integrated into the debugger allowing easy setup, capture and display of trace and profiling data. Support for both probe based capture and streaming to the host options
  • Debug/analytics IP support including rich data visualisation (e.g. profiling or bus monitor display) with support for analytics IP configuration and data retrieval via JTAG, USB and other hardware interfaces
  • OS debug awareness
  • XML database driven Peripheral Viewer
  • Heterogeneous debug support for cores sharing a single hardware (e.g. JTAG) interface
  • ROM or RAM based debugging support (e.g. hardware breakpoints for flash-based support)
  • Step-back/rewind support based on captured trace information. Allows you to go back in time and debug from any captured point in the trace history

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